Machine Learning Capabilities to DFM Signoff for FinFET Solutions

GLOBALFOUNDRIES (GF) and Cadence Design Systems, have announced a collaboration to facilitate design for manufacturing (DFM) signoff with machine learning (ML) prediction capabilities. As part of the collaboration, the Cadence Litho Physical Analyzer, a DFM pattern analysis tool integrated with GF-developed ML models, has been qualified for GF’s 12LP and 12LP+ solutions.

The ML-enhanced Cadence Litho Physical Analyzer, optimized for GF’s 12LP and 12LP+ solutions, provides customers with in-design automated DFM hotspot detection and fixing capabilities to speed implementation and time to market. The ML-based enhancement delivers up to 33% greater detection efficiency versus traditional pattern-matching checks with less than 10% runtime impact.

GF has released a corresponding ML-enhanced DFM kit as an update to its 12LP process design kits (PDKs), with the 12LP+ version scheduled for release in the second quarter of 2021, providing customers with a simple path to speed design and production of chips optimized for the artificial intelligence (AI), data center, internet of things (IoT) and other markets.

GF’s most advanced FinFET solution, 12LP+ is optimized for AI training and inference applications and offers chip designers an efficient development experience and a fast time-to-market. 12LP+ builds upon GF’s established 14nm/12LP platform, of which GF has shipped more than one million wafers. 12LP and 12LP+ deliver a superior combination of AI power, performance and area (PPA) benefits without the need to migrate to smaller and much costlier geometries.

“By incorporating ML capabilities into the Cadence Litho Physical Analyzer, customers using GF’s 12LP platform and 12LP+ solution can verify signoff quality during implementation, thereby achieving better silicon quality,” said Jim Blatchford, Vice President of Technology Enablement at GLOBALFOUNDRIES. “Our collaboration with Cadence also allowed the swift enablement and seamless integration with our customers’ design flows through the delivery of this new capability in our 12LP and 12LP+ PDKs.”

The Cadence Litho Physical Analyzer, enhanced with ML, seamlessly integrates with the Cadence Innovus Implementation System and Cadence Virtuoso custom IC design platform, providing customers with a smoother design experience through a common, familiar interface. The Litho Physical Analyzer is part of the broader Cadence digital full flow, which supports Cadence’s Intelligent System Design strategy, enabling system-on-chip (SoC) design excellence.

“Not only does our Litho Physical Analyzer tool include ML capabilities, but the entire Cadence implementation platform has ML capabilities as well, which let us provide customers with a highly sophisticated solution,” said Michael Jackson, Corporate Vice President, R&D in the Digital & Signoff Group at Cadence.

“Through our latest collaboration with GF, customers can leverage our tools with the added boost of ML capabilities to achieve design success using GF’s 12LP/12LP+ solutions. Furthermore, our Litho Physical Analyzer with ML capabilities enhances GF’s DRC+ capabilities and improves yield based on the tool’s ability to effectively catch more hotspots and repair previously undetected hotspot patterns.”

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