Engineering 101

System Analysis Design Tool Flow for 2.5/3D Chip Designs

Cadence Design Systems has announced that Samsung Foundry has certified the complete Cadence system analysis and advanced packaging design tool flow as a Samsung Multi-Die Integration (MDI) advanced packaging reference flow.

This proven on-/off-chip design flow, which features Cadence multi-physics system analysis tools including the Celsius Thermal Solver and Clarity 3D Solver, accelerates the planning, implementation, verification and signoff of 2.5D and 3D multi-die chip designs employed in hyperscale computing, 5G communications and automotive applications, particularly those utilizing artificial intelligence (AI).

Designers of advanced IC packages face many challenges that are directly addressed by this documented, step-by-step approach to validate critical electrical and thermal requirements for first-pass success. Cadence collaborated with Samsung to certify the flow, which was verified on eight SerDes differential pairs across a 46x32mm interposer.

Cadence’s multi-physics system analysis solution includes the Celsius Thermal Solver, Clarity 3D Solver, Voltus IC Power Integrity Solution, Sigrity SystemSI technology and Sigrity Broadband SPICE technology, which can be used with the Allegro Package Designer Plus for ball-grid array (BGA) substrate layout and analysis and with the Innovus Implementation System for layout and analysis of 3D-IC chip stacks.

Both implementation solutions integrate seamlessly with Cadence’s OrbitIO Interconnect Designer for system-level planning and optimization, as well as the Pegasus Verification System for signoff design rule checks (DRCs) and layout versus schematic (LVS).

Using the Clarity 3D Solver, the SerDes connections were extracted with all surrounding power and the complex package with a level of detail that was not possible with other commercially available 3D advanced packaging solutions. The SI and EM analyses were performed by the Sigrity SystemSI technology and the Clarity 3D Solver respectively.

The Celsius Thermal Solver directly read the extracted complex package design and generated the thermal model that was used in the simulation. The thermal solution was enabled by the direct read of the chip-level GDS database and contained more detail than other commercially available thermal tools, with highly accurate results.

“The results from the Cadence analysis tools, particularly the Celsius Thermal Solver and Clarity 3D Solver, provide pure 3D full-wave and highly detailed thermal simulation for much more accurate results,” said Sangyun Kim, Vice President of Foundry Design Technology Team at Samsung Electronics. “This collaboration provides our mutual customers with a trusted system design enablement solution for advanced packages that enables them to implement state-of-the-art products.”

“This certification helps our mutual customers quickly achieve lower power and higher performance using a much smaller form factor in their designs,” stated Ben Gu, Vice President of multi-physics system analysis in the Custom IC & PCB Group at Cadence. “Extraction accuracy is greatly improved over previous disjointed approaches from multiple EDA vendors. This flow helps reduce cost and improve reliability of their products using advanced MDI packaging techniques.”

The certified Cadence flow supports Cadence’s Intelligent System Design strategy, which enables customers to accelerate system innovation.

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