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AI’s Next Bottleneck Is Moving Data Between Chips

AI processors continue to get faster, but building a larger AI system involves more than adding more GPUs. Those processors also need to exchange enormous amounts of data, often while working together on the same model. As clusters grow, the connections between processors are becoming an increasingly important part of system performance.

The industry is already looking toward optical interconnects to handle more of this traffic. On August 13, Lightmatter announced the formal launch of Open Silicon Photonics for AI Systems, a 19-company initiative that is now part of the Open Compute Project (OCP). The group is developing a common architecture for co-packaged optics in AI infrastructure, including specifications for how optical components could be integrated into systems from different vendors.

The effort comes as electrical interconnects are becoming more difficult to scale to the speeds and distances required by large AI systems.

Moving Data Is Getting Harder

Copper remains widely used for short connections inside computing systems, but signal loss increases as data rates rise. Engineers can compensate with equalization, retimers and other circuitry, though those solutions add power and complexity.

Distance also becomes a problem. Lightmatter estimates that copper connections capable of reaching about 2 meters at 112G signaling could fall below 25 centimeters as signaling approaches 448G PAM4.

That leaves little room for connecting processors spread across trays or racks.

AI workloads make the problem more noticeable because accelerators frequently need to exchange data while training or running large models. Adding processors does not provide the expected performance improvement if those processors spend more time waiting for data from elsewhere in the system.

The interconnect also consumes power. At the scale of an AI cluster, the energy used to move data contributes to the same power and cooling constraints already affecting processors and memory.

Optical communication offers a way to move data farther at high bandwidth without the same electrical losses. The challenge is getting the electrical signal to the optical interface efficiently.

Bringing the Optics Closer

Most optical networking equipment converts electrical signals to light in pluggable transceivers located at the edge of a switch. The signal still has to travel electrically from the processor or switch ASIC across the circuit board before reaching that module.

Co-packaged optics shortens that path by putting the optical engines much closer to the compute or switching silicon.

Broadcom is already using this approach in commercial Ethernet switches. Its co-packaged optical designs integrate optical engines with the switch ASIC on the same package substrate, reducing the distance high-speed electrical signals have to travel before being converted to light.

For AI systems, shortening that electrical connection could help reduce signal loss and power consumption while supporting higher bandwidth density.

It also changes how the rest of the system has to be designed. Fiber routing has to reach the package. Optical and electronic components have different thermal requirements. Engineers also have to consider how components are tested, replaced or upgraded once the optical interface is no longer a conventional pluggable module.

These are some of the issues the new OCP effort is trying to address.

Why an Open Architecture Matters

Co-packaged optics itself is not new. What is still developing is a common way to integrate it into large AI systems.

The Open Silicon Photonics for AI Systems initiative is working on specifications covering the optical, mechanical, electrical and thermal interfaces needed to support co-packaged optics. Its initial architecture is intended to scale from systems with 72 accelerators to clusters with more than 1,024.

The group is also looking at how these systems fit within existing OCP rack infrastructure.

One part of that work involves separating passive optical infrastructure from components likely to change more frequently. Fiber routing and optical distribution, for example, could remain in place while optical engines or compute hardware are upgraded.

That becomes more important as AI hardware moves through shorter development cycles. A new generation of accelerators should not require operators to replace every part of the optical infrastructure around them.

Common interfaces could also make it easier for components from different suppliers to work within the same system. Without them, co-packaged optics risks developing as a collection of vendor-specific implementations.

The Interconnect Becomes Part of the Compute System

The move toward co-packaged optics reflects a broader change in AI hardware design. Processor performance alone no longer determines how quickly a large system can run a workload.

Memory bandwidth, networking and the connections between accelerators all affect how effectively the available computing resources are used. As systems grow, those relationships become harder to separate.

That puts more pressure on the hardware responsible for moving data. Electrical interconnects will continue to have a place inside AI systems, particularly over short distances, but optics is moving closer to the processor as bandwidth requirements increase.

The first specifications from the OCP initiative are expected in the fourth quarter of 2026. Their significance will depend in part on how widely they are adopted, but the creation of the workstream points to where the industry sees the problem heading.

AI systems need faster processors. They also need a practical way for those processors to keep talking to one another as the systems around them continue to grow.

 

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