Synopsys and Ixia have announced a multi-year, strategic collaboration to enable a paradigm shift for system validation of complex networking system-on-chips (SoCs) using emulation and a virtual tester.
The new paradigm is a faster, more effective alternative to traditional in-circuit emulation, which no longer scales for the port density and software complexity of next-generation networking SoCs, with the use of an emulation system connected to a true virtual tester solution. Synopsys has released its ZeBu Virtual Network Tester Solution, which integrates Synopsys’ ZeBu emulation system with Ixia’s IxVerify virtual network tester.
Together, these solutions enable validation continuity that spans pre- and post-silicon use providing a full-featured protocol testing solution to reduce overall project schedules, thus shifting-left traditional post-silicon use cases to the pre-silicon domain.
Networking semiconductor companies can now accelerate their pre-silicon and post-silicon system validation for complex networking SoCs that feature hundreds of ports and 24+ terabit per second throughput.
“Our goal is to support networking equipment and semiconductor customers through their product design and validation cycle as early as possible,” said Scott Westlake, Vice President of Alliances at Keysight’s Ixia Solutions Group. “We are pleased to work with Synopsys, an emulation partner committed to developing deep, feature-rich integration with our virtual testing technology that helps achieve that goal and faster time-to-market for advanced networking products.”
Susheel Tadikonda, Vice President, Solutions Engineering in the Synopsys Verification Group, said: “Our ZeBu emulation platform has been used by many industry-leading companies to accelerate software bring-up for complex SoCs in the pre-silicon stage.
“By collaborating closely with Ixia, we are extending our solutions to meet the specific needs of networking companies through the addition of virtual tester solutions for pre-silicon SoC validation that deliver feature-rich pre- to post-silicon validation continuity.”