For decades, copper has carried data between chips, across circuit boards, and through the cables connecting computing systems. Each generation of faster processors has pushed more information through those electrical connections, with engineers finding new ways to compensate for the signal losses that come with higher frequencies.
That approach is becoming increasingly difficult to sustain.
Data rates are climbing into the hundreds of gigabits per second per lane, while AI accelerators and high-performance computing systems require more connections between processors. Copper can still support these speeds, but the distance a signal can travel without significant degradation is shrinking, and the circuitry needed to recover it is becoming more complex.
The question is no longer simply how fast copper can carry data. It’s how much power and engineering effort a system can afford to spend making that transmission work.
The Physics Behind Copper’s Limitations
Copper’s electrical conductivity makes it an effective material for transmitting high-speed signals, but its performance changes as frequency increases.
At higher frequencies, the skin effect causes alternating current to concentrate closer to the surface of a conductor, increasing its effective resistance. Surface roughness becomes more significant as current flows through an increasingly thin region of copper. Meanwhile, dielectric losses in the surrounding PCB materials dissipate additional signal energy.
These effects contribute to insertion loss, reducing the amplitude of a signal as it travels through a transmission channel.
Connectors, vias, and changes in trace geometry introduce additional complications. Impedance discontinuities create reflections, while closely spaced conductors can couple energy into neighboring channels through crosstalk.
At lower speeds, these effects may leave sufficient margin for reliable communication. At very high data rates, however, the available margin becomes much smaller.
Engineers must evaluate the entire transmission path, including the semiconductor package, PCB traces, connectors, and cables. A connector with excellent standalone performance cannot compensate for excessive losses elsewhere in the channel.
Industry guidance for 224Gbps interconnect design increasingly emphasizes system-level modeling, including S-parameters that characterize how individual components affect signal transmission.[1]
Getting More Data Through the Same Channel
One way to increase transmission capacity without proportionally increasing signal bandwidth is to change how information is encoded.
Traditional non-return-to-zero (NRZ) signaling represents data using two voltage levels. Four-level pulse amplitude modulation (PAM4) instead uses four distinct amplitudes, allowing each transmitted symbol to represent two bits.
This effectively doubles the number of bits transmitted per symbol compared with NRZ, although the smaller separation between voltage levels makes the signal more susceptible to noise and distortion.
PAM4 has become an important part of high-speed electrical interface development. The PCI Express 7.0 specification, for example, supports a raw transfer rate of 128GT/s per lane using PAM4 signaling. An x16 configuration provides up to 512GB/s of aggregate bidirectional bandwidth.[2]
But modulation alone cannot overcome the physical characteristics of the transmission channel.
As data rates rise, receivers increasingly depend on equalization to compensate for frequency-dependent loss. Transmitters can emphasize selected portions of a signal, while receivers use techniques such as continuous-time linear equalization and decision feedback equalization to improve data recovery.
Forward error correction can address certain transmission errors, provided the received signal remains within the system’s correction capability.
These methods extend the usefulness of copper, but they also require additional circuitry. More sophisticated signal processing can increase power consumption, introduce latency, and complicate transceiver design.
Eventually, the energy required to maintain a reliable electrical link becomes an important part of the system’s overall power budget.
Copper Isn’t Finished Yet
Despite these challenges, copper continues to advance.
The Optical Internetworking Forum (OIF) has been developing its Common Electrical I/O (CEI) 224G interface family to support electrical links operating at approximately 224Gbps per lane.
Rather than treating every connection as having the same requirements, the initiative separates different transmission distances into categories ranging from extremely short chip-to-chip connections to longer backplane and copper cable interfaces.
The medium-reach work targets connections up to 500mm of PCB and one connector, while the long-reach effort addresses paths up to 1,000mm and two connectors.[3]
These developments demonstrate that the industry is not abandoning electrical communication. Instead, it is becoming more selective about where copper is used and how channels are constructed.
For example, high-speed twinaxial cables can provide a lower-loss alternative to routing signals across long sections of PCB material.
Engineers can also position connectors closer to processors, reducing the length of the electrical path before signals enter a cable assembly.
Samtec demonstrated a 224Gbps PAM4 backplane cable system in 2026 with a measured total channel loss of 43dB. Significantly, 14dB of that loss came from the test boards, illustrating how channel architecture can affect overall performance.[4]
Advances in low-loss PCB materials, connector construction, and semiconductor packaging are also helping extend copper’s operating range.
The practical limitation is therefore not a single frequency or data rate at which copper suddenly stops working. It is a combination of reach, signal quality, complexity, and power consumption.
Moving the Conversion Closer to the Processor
Optical communication offers a different approach.
Instead of transmitting data as electrical signals through copper conductors, optical links encode information onto light traveling through fiber.

Fiber avoids many of the frequency-dependent electrical losses associated with long copper channels and can support high bandwidth over substantially greater distances.
Optical connections have long been used between networking equipment and across data centers. The newer challenge is determining how close optical transmission should move toward the processors themselves.
Conventional pluggable optical transceivers typically sit at the edges of networking equipment. Electrical signals must travel from the switch ASIC across the PCB to the optical module, where they are converted into light.
As electrical interface speeds rise, that path becomes increasingly expensive in terms of signal integrity and power.
Co-packaged optics (CPO) takes a different approach by placing optical engines close to the processing silicon, often within a common package or package-level assembly. This shortens the high-speed electrical connection before conversion to an optical signal.
Reducing electrical path length can lower channel loss and reduce the equalization required to maintain reliable transmission.
Broadcom’s third-generation CPO technology, announced in 2025, supports 200Gbps-per-lane optical connectivity. The company has continued developing integrated optical architectures intended to reduce the electrical losses between switching silicon and optical interfaces.[5]
NVIDIA has also been developing co-packaged optical networking platforms that combine photonic and electronic integrated circuits with advanced packaging and optical connectivity technologies.[6]
These efforts indicate that optical integration is moving from a component-level consideration into the architecture of high-performance computing systems.
Why Not Replace Every Copper Connection With Fiber?
Although optics addresses many transmission-distance challenges, it introduces another set of engineering considerations.
Electrical signals must still be converted into optical signals and back again. That requires laser sources, modulators, photodetectors, and associated driver and receiver circuitry.
These components consume power and occupy space. Optical systems also require precise assembly, thermal management, and reliable fiber connections.
The electrical-to-optical conversion process can offset some of the advantages of optical transmission, particularly over very short distances.
Copper remains attractive for connections within semiconductor packages, between nearby components, and across short PCB channels. These applications often benefit from simpler integration, lower component costs, and the absence of optical conversion hardware.
The economics change as the required transmission distance increases.
A short electrical link may consume less energy than an equivalent optical connection. A longer electrical path requiring extensive equalization or retiming may no longer have that advantage.
This is why the transition toward optics is unlikely to occur uniformly across computing systems.
Instead, engineers are evaluating different interconnect technologies according to the distance, bandwidth, latency, and power requirements of each connection.
The Next Design Challenge Is Choosing Where Copper Ends
Future high-performance systems will likely depend on a combination of electrical and optical connections.
Copper will continue carrying signals where short transmission distances and practical packaging make it effective. Optical links are expected to take on a larger role as bandwidth requirements extend beyond the reach that electrical channels can support efficiently.
The distinction is already influencing industry roadmaps.
IEEE’s 802.3dj project addresses Ethernet speeds through 1.6Tbps, including electrical and optical physical-layer technologies.[7] The PCI-SIG Optical Work Group is also investigating how PCI Express can better accommodate optical interconnects.[8]
For design engineers, this creates a broader set of decisions.
Signal integrity can no longer be evaluated independently of power consumption, packaging, thermal performance, or system architecture. The placement of a processor relative to its connectors and optical interfaces may determine whether an interconnect meets its performance targets.
Copper is not approaching a universal speed limit. Engineers continue to improve its performance through better materials, more sophisticated signaling, and more efficient channel designs.
But those improvements come at a cost.
As computing systems demand greater bandwidth across increasingly complex architectures, the most important question may not be how much faster copper can go.
It may be whether copper is still the best way to make a particular connection.
Endnotes
1. Molex, An Introduction to 224G System Architecture
2. PCI-SIG, PCI Express 7.0 FAQ
3. OIF, Common Electrical I/O (CEI)-224G
4. Samtec, New 224 Gbps PAM4 Backplane, Mid-Board Cable Solutions
5. Broadcom, Third-Generation Co-Packaged Optics Technology
6. NVIDIA, How Industry Collaboration Fosters NVIDIA Co-Packaged Optics